Commit: 62c59eaa2dcaf76dec0fc876e980b1beb4809320 Parent: 6066ac152ab6459ab13cb1f1c79f8275426a4989 Author: Vi Grey Date: 2023-09-15 23:46 UTC Summary: More CPU RAM Initialization modes and graphics LICENSE | 2 +- Makefile | 5 +- README.md | 84 --------------------------- README.txt | 120 ++++++++++++++++++++++++++++++++++++++ bin/nes-ram-to-fceux-INLRetro.nes | Bin 40960 -> 0 bytes bin/nes-ram-to-fceux.fdb | 2 + bin/nes-ram-to-fceux.nes | Bin 40976 -> 40976 bytes src/controller.asm | 59 +++++++++++++++++++ src/defs.asm | 59 +++++++++++-------- src/graphics/tileset.chr | Bin 0 -> 8192 bytes src/mem.asm | 227 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/nes-ram-to-fceux.asm | 67 +++++++++++++--------- src/prg.asm | 248 ++++++++++++++++++++++++++++++++++++++++++++++++++----------------------------- src/ram.asm | 29 ++++++++++ src/text.asm | 129 +++++++++++++++++++++++++++++++++++++++++ 15 files changed, 800 insertions(+), 231 deletions(-) diff --git a/LICENSE b/LICENSE index 1cb1aaf..4c502fd 100644 --- a/LICENSE +++ b/LICENSE @@ -1,4 +1,4 @@ -Copyright (C) 2020, Vi Grey +Copyright (C) 2020-2023, Vi Grey All rights reserved. Redistribution and use in source and binary forms, with or without diff --git a/Makefile b/Makefile index 6d42a82..4c430d6 100644 --- a/Makefile +++ b/Makefile @@ -1,4 +1,4 @@ -# Copyright (C) 2020, Vi Grey +# Copyright (C) 2020-2023, Vi Grey # All rights reserved. # # Redistribution and use in source and binary forms, with or without @@ -29,8 +29,7 @@ CURRENTDIR := $(dir $(realpath $(firstword $(MAKEFILE_LIST)))) all: mkdir -p $(CURRENTDIR)bin; \ cd $(CURRENTDIR)src; \ - asm $(PKG_NAME).asm ../bin/$(PKG_NAME).nes; \ - head -c -16 ../bin/$(PKG_NAME).nes > ../bin/$(PKG_NAME)-INLRetro.nes ; \ + asm6 $(PKG_NAME).asm ../bin/$(PKG_NAME).nes; \ clean: rm -rf -- $(CURRENTDIR)bin; \ diff --git a/README.md b/README.md deleted file mode 100644 index 08def83..0000000 --- a/README.md +++ /dev/null @@ -1,84 +0,0 @@ -# NES RAM to FCEUX RAM Tool - -##### Version 0.0.0 - -NES ROM for NROM boards that injects the initial CPU and PPU RAM values of the FCEUX emulator into an NES Console's CPU and PPU RAM. - -**_NES RAM to FCEUX RAM Tool was created by Vi Grey (https://vigrey.com) and is licensed under the BSD 2-Clause License._** - - -### Description: -An NES ROM for NROM boards that injects the initial CPU and PPU values of the FCEUX emulator into an NES Console's CPU and PPU RAM to allow for consistent initial RAM values for the start of other games. - - -### Platforms: -- Linux -- macOS -- BSD - - -### NES ROM Build Dependencies: -- asm6 _(You'll probably have to build asm6 from source. Make sure the asm6 binary is named **asm** and that the binary is executable and accessible in your PATH. The source code can be found at **http://3dscapture.com/NES/asm6.zip**)_ - - -### Build NES ROM: -From a terminal, go to the the main directory of this project (the directory this README.md file exists in). You can then build the NES ROM with the following command. - - $ make - -The resulting NES ROM for the NROM board will be located at **bin/nes-ram-to-fceux-INLRetro.nes**. This ROM will be ready for burning onto the Infinite NES Lives NROM Board. A version including the 16 byte iNES header is also included at bin/nes-ram-to-fceux.nes if you need it. - - -### Cleaning NES ROM Build Environment: -If you used `make` to build the NES ROM file, you can run the following command to clean up the build environment. - - $ make clean - - -### Cartridge Swapping -After the FCEUX initial CPU and PPU RAM values are injected into the NES Console's CPU and PPU RAM (this process will take about 4-5 frames), the game will run an infinite loop that modifies CPU RAM address $0100 to #$4C (JMP) and $0102 to #$01, thus creating a JMP $0100 command at CPU RAM values $0100-$0102 (inclusive range). With the exception of addresses $0100 and $0102, the CPU and PPU RAM of the NES Console should be set to the initial RAM values of FCEUX. At this point, while the power is on, you can remove the cartridge from the console and insert the next game you wish to use, then hit **RESET**. The new game should now start with a consistent CPU and PPU memory state. - -**Please Note:** If the NES Console has a functioning CIC Lockout Chip, the console will power off and back on repeatedly until the **RESET** button is pressed. This will cause the NES Console to break out of the infinite loop. CPU RAM also degrades over time while the cartridge is being swapped on an NES Console with a functioning CIC Lockout Chip. It is still possible to cartridge swap on an unmodified front loading NES Console, but be aware of likely RAM decay. If the NES Console has a disabled CIC Lockout Chip (like a modded front loader) or no CIC Lockout Chip at all (like the top loader NES-101 console model), the console should stay powered on running the infinite loop. - - -### Write NES ROM to INL NROM Using INL-Retro Dumper/Programmer - -In the host directory of the INL-retro-progdump repository from *https://gitlab.com/InfiniteNesLives/INL-retro-progdump*, run the following command. Replace **/path/to/nes-ram-to-fceux-INLRetro.nes** with the path to the **nes-ram-to-fceux-INLRetro.nes** ROM. The NROM board can be set to either **Vertical** or **Horizontal** Mirroring. - - $ ./inlretro -s scripts/inlretro2.lua -c NES -m nrom -x 32 -y 8 -p /path/to/nes-ram-to-fceux-INLRetro.nes - - -### Special Thanks - -- **DwangoAC** (https://tas.bot): For finally convincing me to make a tool like this after I have procrastinated on making a tool like this for many months - -- **Brad Smith** (http://rainwarrior.ca): For providing me with tips and knowledge while streaming production of the TKROM version of the generic NES RAM Debug Tool - -- **Paul Molloy** (https://infiniteneslives.com): For creating and providing the NES NROM board for testing and use - - -### License: - Copyright (C) 2020, Vi Grey - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS \`\`AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. diff --git a/README.txt b/README.txt new file mode 100644 index 0000000..c68f126 --- /dev/null +++ b/README.txt @@ -0,0 +1,120 @@ +# NES RAM to FCEUX RAM Tool + +##### Version 0.1.0 + +NES ROM for NROM boards that injects the initial CPU and PPU RAM values +of the FCEUX emulator into an NES Console's CPU and PPU RAM. + +NES RAM to FCEUX RAM Tool was created by Vi Grey (https://vigrey.com) + and is licensed under the BSD 2-Clause License. + + +### Description: +An NES ROM for NROM boards that injects the initial CPU and PPU values +of the FCEUX emulator into an NES Console's CPU and PPU RAM to allow +for consistent initial RAM values for the start of other games. + + +### Platforms: +- Linux +- macOS +- BSD + + +### NES ROM Build Dependencies: +- asm6 (You'll probably have to build asm6 from source. I am hosting a +copy of the source code at git://vigrey.com/git/asm6 but the source +code can also be found at https://3dscapture.com/NES/asm6.zip at the +time of writing this.) + + +### Build NES ROM: +From a terminal, go to the the main directory of this project (the +directory this README.md file exists in). You can then build the NES +ROM with the following command. + + $ make + +The resulting NES ROM will be located at `bin/nes-ram-to-fceux.nes`. + + +### Cleaning NES ROM Build Environment: +If you used `make` to build the NES ROM file, you can run the following +command to clean up the build environment. + + $ make clean + + +### Selecting Initial CPU RAM: +Upon starting up the cartridge, either from Power-On or Reset, you can +select which initial CPU RAM you want. To do this, you will need to be +pressing specific buttons on either controller on Power-On or Reset. +The buttons are as follows: + +* No direction on the D-pad: "Default" repeating sequence of + 00 00 00 00 FF FF FF FF +* Left: All FF bytes +* Up: All 00 bytes +* Right: Random bytes + + +### Initializing PPU RAM: +Along with initializing the CPU RAM, you can also initialize the PPU +RAM. To do this, just hold B on either controller on Power-On or +Reset. This can be done with a selected CPU RAM Initialization mode as +well. Keep in mind though that if you clear the PPU RAM, the screen +will end up being solid gray, as all of the video RAM, including the +palette and drawn tiles will be zeroed out. + + +### Cartridge Swapping +After the FCEUX initial CPU and PPU RAM values are injected into the +NES Console's CPU and PPU RAM (this process will take about 4-10 +frames), the game will run an infinite loop that modifies CPU RAM +address $01FD to #$4C (JMP), $01FE to #$FD and $01FF to #$01, thus +creating a JMP $01FD command at CPU RAM values $01FD-$01FF (inclusive +range). With the exception of addresses $01FD, $01FE, and $01FF, the +CPU RAM of the NES Console should be set to the initial RAM values of +FCEUX. If B was held at Power-On or Reset, then the PPU RAM of the +NES Console should be set to the initial PPU RAM values of FCEUX as +well. At this point, while the power is on, you can remove the +cartridge from the console and insert the next game you wish to use, +then press (but don't hold) "RESET". The new game should now start +with a consistent CPU (and PPU if that was optionally set) memory +state. + +**Please Note:** If the NES Console has a functioning CIC Lockout Chip, +the console will power off and back on repeatedly until the RESET +button is pressed. This will cause the NES Console to break out of the +infinite loop. CPU RAM also degrades over time while the cartridge is +being swapped on an NES Console with a functioning CIC Lockout Chip. +It is still possible to cartridge swap on an unmodified front loading +NES Console, but be aware of likely RAM decay. If the NES Console has a +disabled CIC Lockout Chip (like a modded front loader) or no CIC +Lockout Chip at all (like the top loader NES-101 console model), the +console should stay powered on running the infinite loop. + + +### Write NES ROM to INL NROM Using INL-Retro Dumper/Programmer + +In the host directory of the INL-retro-progdump repository from +https://gitlab.com/InfiniteNesLives/INL-retro-progdump, run the +following command. Replace `/path/to/nes-ram-to-fceux.nes` with the +path to the `nes-ram-to-fceux.nes` ROM. The NROM board can be set to +either Vertical or Horizontal Mirroring. + + $ ./inlretro -s scripts/inlretro2.lua -c NES -m nrom -x 32 -y 8 -p /path/to/nes-ram-to-fceux.nes + + +### Special Thanks + +- DwangoAC (https://tas.bot): For finally convincing me to make a tool + like this after I have procrastinated on making a tool like this for + many months + +- Brad Smith (http://rainwarrior.ca): For providing me with tips and + knowledge while streaming production of the TKROM version of the + generic NES RAM Debug Tool + +- Paul Molloy (https://infiniteneslives.com): For creating and + providing the NES NROM board for testing and use diff --git a/bin/nes-ram-to-fceux-INLRetro.nes b/bin/nes-ram-to-fceux-INLRetro.nes deleted file mode 100644 index 64192a4..0000000 Binary files a/bin/nes-ram-to-fceux-INLRetro.nes and /dev/null differ diff --git a/bin/nes-ram-to-fceux.fdb b/bin/nes-ram-to-fceux.fdb new file mode 100644 index 0000000..c614da5 --- /dev/null +++ b/bin/nes-ram-to-fceux.fdb @@ -0,0 +1,2 @@ +BreakPoint: startAddr=000000BB endAddr=00000000 flags=ER--X- condition="" desc="" +BreakPoint: startAddr=00000073 endAddr=00000000 flags=ER--X- condition="" desc="" diff --git a/bin/nes-ram-to-fceux.nes b/bin/nes-ram-to-fceux.nes index f618152..25dcc9a 100644 Binary files a/bin/nes-ram-to-fceux.nes and b/bin/nes-ram-to-fceux.nes differ diff --git a/src/controller.asm b/src/controller.asm new file mode 100644 index 0000000..6a7ca87 --- /dev/null +++ b/src/controller.asm @@ -0,0 +1,59 @@ +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. + + +GetControllerInput: +; Tell both controllers to latch buttons +LatchController: + lda #$01 + sta $4016 + lda #$00 + sta $4016 ; Sending 01 then 00 to $4016 strobes the controllers for input values + +; Get button presses from both controllers +; Logical OR them together and store in "controller" +PollController: + ldx #$08 ; 8 buttons total +PollController1Loop: + lda $4016 ; player 1 +PollController1: + lsr A ; shift right + rol controller ; rotate left button vector in controller mem location + dex + bne PollController1Loop + ldy controller ; store controller data in y register for a bit later + ldx #$08 ; 8 buttons total +PollController2Loop: + lda $4017 ; player 2 +PollController2: + lsr A ; shift right + rol controller ; rotate left button vector in controller + dex + bne PollController2Loop + tya + ora controller + sta controller ; logical or controller 1 and 2 and store it in controller + jmp GetControllerInputDone diff --git a/src/defs.asm b/src/defs.asm index b3e2199..ea67e34 100644 --- a/src/defs.asm +++ b/src/defs.asm @@ -1,27 +1,27 @@ -;; Copyright (C) 2020, Vi Grey -;; All rights reserved. -;; -;; Redistribution and use in source and binary forms, with or without -;; modification, are permitted provided that the following conditions -;; are met: -;; -;; 1. Redistributions of source code must retain the above copyright -;; notice, this list of conditions and the following disclaimer. -;; 2. Redistributions in binary form must reproduce the above copyright -;; notice, this list of conditions and the following disclaimer in the -;; documentation and/or other materials provided with the distribution. -;; -;; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND -;; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -;; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE -;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -;; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -;; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -;; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -;; SUCH DAMAGE. +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. PPU_CTRL = $2000 PPU_MASK = $2001 @@ -32,6 +32,15 @@ PPU_SCROLL = $2005 PPU_ADDR = $2006 PPU_DATA = $2007 +BUTTON_A = 1 << 7 +BUTTON_B = 1 << 6 +BUTTON_SELECT = 1 << 5 +BUTTON_START = 1 << 4 +BUTTON_UP = 1 << 3 +BUTTON_DOWN = 1 << 2 +BUTTON_LEFT = 1 << 1 +BUTTON_RIGHT = 1 << 0 + CALLBACK = $FFFA -STACK = $0100 +STACK = $01FD diff --git a/src/graphics/tileset.chr b/src/graphics/tileset.chr new file mode 100644 index 0000000..f2986a5 Binary files /dev/null and b/src/graphics/tileset.chr differ diff --git a/src/mem.asm b/src/mem.asm new file mode 100644 index 0000000..46f15bf --- /dev/null +++ b/src/mem.asm @@ -0,0 +1,227 @@ +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. + +WriteDefaultCPU: + ldx #$00 +WriteDefaultCPULoop: + txa + and #%00000100 + beq WriteDefaultCPULoopContinue + lda #$FF ; Sets A to #$FF if bit 2 of X is 1 otherwise sets A to #$00 +WriteDefaultCPULoopContinue: + sta $0000, x +WriteDefaultCPU100Page: + cpx #$FD + bcs WriteDefaultCPU100PageDone + sta $0100, X +WriteDefaultCPU100PageDone: + sta $0200, x + sta $0300, x + sta $0400, x + sta $0500, x + sta $0600, x + sta $0700, x + inx + bne WriteDefaultCPULoop + jmp WriteDefaultText + +WriteFFCPU: + lda #$FF + ldx #$00 +WriteFFCPULoop: + sta $0000, x +WriteFFCPU100Page: + cpx #$FD + bcs WriteFFCPU100PageDone + sta $0100, X +WriteFFCPU100PageDone: + sta $0200, x + sta $0300, x + sta $0400, x + sta $0500, x + sta $0600, x + sta $0700, x + inx + bne WriteFFCPULoop + jmp WriteFFText + +Write00CPU: + lda #$00 + ldx #$00 +Write00CPULoop: + sta $0000, x +Write00CPU100Page: + cpx #$FD + bcs Write00CPU100PageDone + sta $0100, X +Write00CPU100PageDone: + sta $0200, x + sta $0300, x + sta $0400, x + sta $0500, x + sta $0600, x + sta $0700, x + inx + bne Write00CPULoop + jmp Write00Text + +WriteRandomCPU: + lda $100 + eor $101 + eor $102 + eor $103 + eor lfsr + ora #%01010101 ; Seed lfsr with guaranteed non-zero value + sta lfsr + lda $104 + eor $105 + eor $106 + eor $107 + eor (lfsr + 1) + ora #%10101010 ; Seed lfsr + 1 with guaranteed non-zero value + sta (lfsr + 1) + ldx #$00 + ldy #$00 +LFSR: ; Unwrapped LFSR loop + lda lfsr +LFSR0: + lsr + ror (lfsr + 1) + bcc LFSR1 + eor #%11011000 +LFSR1: + lsr + ror (lfsr + 1) + bcc LFSR2 + eor #%11011000 +LFSR2: + lsr + ror (lfsr + 1) + bcc LFSR3 + eor #%11011000 +LFSR3: + lsr + ror (lfsr + 1) + bcc LFSR4 + eor #%11011000 +LFSR4: + lsr + ror (lfsr + 1) + bcc LFSR5 + eor #%11011000 +LFSR5: + lsr + ror (lfsr + 1) + bcc LFSR6 + eor #%11011000 +LFSR6: + lsr + ror (lfsr + 1) + bcc LFSR7 + eor #%11011000 +LFSR7: + lsr + ror (lfsr + 1) + bcc LFSRDone: + eor #%11011000 +LFSRDone: + sta lfsr +WriteRandomCPUZeroPage: + cpy #$01 + bcs WriteRandomCPU100Page + sta $0000, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU100Page: + cpy #$02 + bcs WriteRandomCPU200Page + cpx #$FD + bcs WriteRandomCPU100PageDone + sta $0100, X +WriteRandomCPU100PageDone: + jmp WriteRandomCPUPageContinue +WriteRandomCPU200Page: + cpy #$03 + bcs WriteRandomCPU300Page + sta $0200, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU300Page: + cpy #$04 + bcs WriteRandomCPU400Page + sta $0300, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU400Page: + cpy #$05 + bcs WriteRandomCPU500Page + sta $0400, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU500Page: + cpy #$06 + bcs WriteRandomCPU600Page + sta $0500, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU600Page: + cpy #$07 + bcs WriteRandomCPU700Page + sta $0600, X + jmp WriteRandomCPUPageContinue +WriteRandomCPU700Page: + sta $0700, X +WriteRandomCPUPageContinue: + inx + beq WriteRandomCPUIncPage + jmp LFSR +WriteRandomCPUIncPage: + iny + cpy #$08 + beq WriteRandomCPUEnd + jmp LFSR +WriteRandomCPUEnd: + jmp WriteRandomText + +Write00PPU: + lda #$20 + ldy #$08 + ldx #$00 + sta PPU_ADDR + lda #$00 + sta PPU_ADDR +Write00PPULoop: + sta PPU_DATA + inx + bne Write00PPULoop + dey + bne Write00PPULoop +Write00Palette: + lda PPU_STATUS + lda #$3F + sta PPU_ADDR + lda #$00 + sta PPU_ADDR +Write00PaletteLoop: + sta PPU_DATA + inx + cpx #$20 + bne Write00PaletteLoop + jmp DoneInitializingPPU diff --git a/src/nes-ram-to-fceux.asm b/src/nes-ram-to-fceux.asm index 406d411..9f05489 100644 --- a/src/nes-ram-to-fceux.asm +++ b/src/nes-ram-to-fceux.asm @@ -1,40 +1,53 @@ -;; Copyright (C) 2020, Vi Grey -;; All rights reserved. -;; -;; Redistribution and use in source and binary forms, with or without -;; modification, are permitted provided that the following conditions -;; are met: -;; -;; 1. Redistributions of source code must retain the above copyright -;; notice, this list of conditions and the following disclaimer. -;; 2. Redistributions in binary form must reproduce the above copyright -;; notice, this list of conditions and the following disclaimer in the -;; documentation and/or other materials provided with the distribution. -;; -;; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND -;; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -;; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE -;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -;; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -;; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -;; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -;; SUCH DAMAGE. - +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. .db "NES", $1A .db $02 .db $01 .db $00 .db $00 - .db 0, 0, 0, 0, 0, 0, 0, 0 ;pad header to 16 bytes + .db 0, 0, 0, 0, 0, 0, 0, 0 ; pad header to 16 bytes +.include "ram.asm" .include "defs.asm" .base $8000 .include "prg.asm" +;;;;;;;;;; +;; +;; CALLBACK Vectors +;; +;;;;;;;;;; + + .pad CALLBACK, #$FF + + .dw NMI + .dw RESET + .dw 0 + .base $0000 -.pad $2000, $FF + +.incbin "graphics/tileset.chr" diff --git a/src/prg.asm b/src/prg.asm index cadeb4c..93594b1 100644 --- a/src/prg.asm +++ b/src/prg.asm @@ -1,42 +1,41 @@ -;; Copyright (C) 2020, Vi Grey -;; All rights reserved. -;; -;; Redistribution and use in source and binary forms, with or without -;; modification, are permitted provided that the following conditions -;; are met: -;; -;; 1. Redistributions of source code must retain the above copyright -;; notice, this list of conditions and the following disclaimer. -;; 2. Redistributions in binary form must reproduce the above copyright -;; notice, this list of conditions and the following disclaimer in the -;; documentation and/or other materials provided with the distribution. -;; -;; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND -;; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -;; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE -;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -;; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -;; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -;; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -;; SUCH DAMAGE. +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. RESET: - sei - cld - ldx #$40 - stx $4017 - ldx #$FF - txs - inx - lda #%00000110 - sta PPU_MASK - lda #$00 - sta PPU_CTRL - stx $4010 - ldy #$00 + sei + cld + ldx #$40 + stx $4017 + ldx #$FF + txs + inx + lda #%00000000 + sta PPU_MASK ; Disable Rendering + lda #%00000000 + sta PPU_CTRL ; Disable NMI + stx $4010 ;;;;;;;;;; @@ -46,91 +45,158 @@ RESET: ;;;;;;;;;; InitialVWait: - ldx #$02 + ldx #$02 InitialVWaitLoop: - lda PPU_STATUS - bpl InitialVWaitLoop - dex - bne InitialVWaitLoop - - -;;;;;;;;;; -;; -;; CPU RAM to FCEUX -;; -;;;;;;;;;; - -InitializeCPULoop: - txa - and #%00000100 - beq InitializeCPULoopContinue - lda #$FF -InitializeCPULoopContinue: - sta $0000, x - sta $0100, x - sta $0200, x - sta $0300, x - sta $0400, x - sta $0500, x - sta $0600, x - sta $0700, x - inx - bne InitializeCPULoop + lda PPU_STATUS + bpl InitialVWaitLoop + dex + bne InitialVWaitLoop ;;;;;;;;;; ;; -;; PPU RAM to FCEUX +;; Init PPU RAM ;; ;;;;;;;;;; InitializePPU: - ldy #$08 lda #$20 + ldy #$08 + ldx #$00 sta PPU_ADDR - txa + lda #$00 sta PPU_ADDR - tax InitializePPULoop: sta PPU_DATA inx bne InitializePPULoop dey bne InitializePPULoop - InitializePalette: - lda PPU_STATUS - lda #$3F - sta PPU_ADDR - txa - sta PPU_ADDR -InitializePaletteLoop: - sta PPU_DATA - inx - cpx #$20 - bne InitializePaletteLoop + lda #$3F + sta PPU_ADDR + lda #$00 + sta PPU_ADDR + lda #$0F + ldx #$30 + sta PPU_DATA + stx PPU_DATA + stx PPU_DATA + stx PPU_DATA ;;;;;;;;;; ;; -;; Cartridge Swap Infinite Loop Start +;; Get Controller Input ;; ;;;;;;;;;; - ldx #$4C - stx $0100 - inc $0102 - jmp STACK +jmp GetControllerInput +GetControllerInputDone: + +;;;;;;;;;; +;; +;; Write Screen Text +;; +;;;;;;;;;; + +jmp WriteScreen +WriteScreenDone: + + +;;;;;;;;;; +;; +;; CPU RAM to FCEUX +;; +;;;;;;;;;; + +lda PPU_STATUS +lda #$22 +sta PPU_ADDR +lda #$00 +sta PPU_ADDR + +lda controller +and #BUTTON_LEFT +beq NotButtonLeft + jmp WriteFFCPU + WriteFFCPUDone: + jmp DoneInitializingCPU +NotButtonLeft: + lda controller + and #BUTTON_UP + beq NotButtonUp + jmp Write00CPU + Write00CPUDone: + jmp DoneInitializingCPU +NotButtonUp: + lda controller + and #BUTTON_RIGHT + beq NotButtonRight + jmp WriteRandomCPU + WriteRandomCPUDone: + jmp DoneInitializingCPU +NotButtonRight: + jmp WriteDefaultCPU + WriteDefaultCPUDone: + jmp DoneInitializingCPU +DoneInitializingCPU: + + +lda controller +and #BUTTON_B +beq DoneInitializingPPU ;;;;;;;;;; ;; -;; CALLBACK Vectors +;; Init PPU RAM to FCEUX ;; ;;;;;;;;;; - .pad CALLBACK, #$FF - .dw 0 - .dw RESET - .dw 0 +jmp Write00PPU +DoneInitializingPPU: + + + +;;;;;;;;;; +;; +;; Enable Rendering +;; +;;;;;;;;;; + +lda #%10000000 +sta PPU_CTRL; Enable NMI + +LoopUntilNMI: + jmp LoopUntilNMI + +NMI: + lda PPU_STATUS + lda #%00001000 + sta PPU_MASK; Enable Rendering + lda #$00 + sta PPU_SCROLL + sta PPU_SCROLL + lda #%00000000 + sta PPU_CTRL; Disable NMI + +;;;;;;;;;; +;; +;; Cartridge Swap Infinite Loop Start +;; +;;;;;;;;;; + +lda #$4C +sta STACK +lda #$FD +sta (STACK + 1) +lda #$01 +sta (STACK + 2) +jmp STACK + + +.include "controller.asm" +.include "mem.asm" +.include "text.asm" diff --git a/src/ram.asm b/src/ram.asm new file mode 100644 index 0000000..ad16408 --- /dev/null +++ b/src/ram.asm @@ -0,0 +1,29 @@ +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. + +.enum $01FD + lfsr dsb 2 + controller dsb 1 +.ende diff --git a/src/text.asm b/src/text.asm new file mode 100644 index 0000000..8edd585 --- /dev/null +++ b/src/text.asm @@ -0,0 +1,129 @@ +; Copyright (C) 2020-2023, Vi Grey +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; +; THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND +; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE +; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +; SUCH DAMAGE. + +ScreenText0: ; 256 (#$100) bytes + .byte " +--------------------------+ " + .byte " | Hold direction during | " + .byte " | Power-On or Reset with | " + .byte " | this cart in NES for | " + .byte " | CPU RAM init mode | " + .byte " +--------------------------+ " + .byte " No Direction: Default " + .byte " Left: All FF " + +ScreenText1: ; 256 (#$100) bytes + .byte " Up: All 00 " + .byte " Right: Random " + .byte " " + .byte " CPU RAM Initialized " + .byte " " + .byte " " + .byte " +--------------------------+ " + .byte " | Also Hold B During | " + +ScreenText2: ; 160 (#$A0) bytes + .byte " | Power-On or Reset with | " + .byte " | this cart in NES for | " + .byte " | PPU RAM init (Screen | " + .byte " | will be blank gray) | " + .byte " +--------------------------+ " + +DefaultText: ; 64 (#$40) bytes + .byte " Default " + .byte " 00 00 00 00 FF FF FF FF " + +AllFFText: ; 32 (#$20) bytes + .byte " All FF " + +All00Text: ; 32 (#$20) bytes + .byte " All 00 " + +RandomText: ; 32 (#$20) bytes + .byte " Random " + +WriteScreen: + lda PPU_STATUS + lda #$20 + sta PPU_ADDR + lda #$80 + sta PPU_ADDR + ldx #$00 +WriteScreenText0Loop: + lda ScreenText0, X + sta PPU_DATA + inx + bne WriteScreenText0Loop +WriteScreenText1Loop: + lda ScreenText1, X + sta PPU_DATA + inx + bne WriteScreenText1Loop +WriteScreenText2Loop: + lda ScreenText2, X + sta PPU_DATA + inx + cpx #$A0 + bne WriteScreenText2Loop + jmp WriteScreenDone + +WriteFFText: + ldx #$00 +WriteFFTextLoop: + lda AllFFText, X + sta PPU_DATA + inx + cpx #$20 + bne WriteFFTextLoop + jmp WriteFFCPUDone + +Write00Text: + ldx #$00 +Write00TextLoop: + lda All00Text, X + sta PPU_DATA + inx + cpx #$20 + bne Write00TextLoop + jmp Write00CPUDone + +WriteRandomText: + ldx #$00 +WriteRandomTextLoop: + lda RandomText, X + sta PPU_DATA + inx + cpx #$20 + bne WriteRandomTextLoop + jmp WriteRandomCPUDone + +WriteDefaultText: + ldx #$00 +WriteDefaultTextLoop: + lda DefaultText, X + sta PPU_DATA + inx + cpx #$40 + bne WriteDefaultTextLoop + jmp WriteDefaultCPUDone